论文:2014,Vol:32,Issue(5):719-724
引用本文:
黄兴利, 胡伟, 慕德俊, 郭蓝天, 李哲. 一种精确故障效应传播的形式化模型[J]. 西北工业大学
Huang Xingli, Hu Wei, Mu Dejun, Guo Lantian, Li Zhe. A Formal Model for Precise Fault Effect Propagation[J]. Northwestern polytechnical university

一种精确故障效应传播的形式化模型
黄兴利1,2, 胡伟1, 慕德俊1, 郭蓝天1, 李哲1
1.西北工业大学 自动化学院, 陕西 西安 710072;
2.温州大学 商学院, 浙江 温州 325035
摘要:
大规模集成电路通常隐含难以检测的设计错误,而在使用过程中又可能产生新的故障点。对故障效应的传播路径和范围进行准确评估,有助于确定关键模块是否受到故障的影响和定位抑制故障效应传播的关键点。然而,常规的故障效应传播分析方法往往忽略了逻辑门对故障传播的阻断效应,以及扇出重回聚区域对故障效应传播的影响。提出了一种精确的故障效应传播模型,并采用布尔逻辑函数对所提出的模型进行了形式化描述。实验结果表明:所提出的模型可对故障效应的传播范围进行更为准确地评估,并显著降低误报率。
关键词:    故障效应分析    故障效应传播    形式化模型    逻辑门   
A Formal Model for Precise Fault Effect Propagation
Huang Xingli1,2, Hu Wei1, Mu Dejun1, Guo Lantian1, Li Zhe1
1. Department of Automatic Control, Northwestern Polytechnical University, Xi'an 710072, China;
2. School of Business, Wenzhou University, Wenzhou 325035,China
Abstract:
Large scale integrated circuits tend to include hard-to-detect design faults.In addition,new faultsmay be produced during runtime.Precise estimate of both the path and region where fault effects propagate to canhelp determine if critical components will be affected by the fault and can locate key nodes for fault propagation sup-pression.However,typical fault effect propagation analysis methods usually ignore the fact that fault effect propaga-tion can be blocked by Boolean gates under certain input combinations and affected by reconvergent fanout regions.In this paper,we propose a precise model for fault effect propagation and present a formal description of such modelusing Boolean functions.Experimental results and their analysis show preliminarily that the proposed model a-chieves more precise estimation of the region that will be influenced by fault effects while significantly reducing falsepositives.
Key words:    fault effect analysis    fault effect propagation    formal model    Boolean gate   
收稿日期: 2014-04-10     修回日期:
DOI:
基金项目: 国家自然科学基金(61303224)、教育部博士点基金(20126102110036)与中国博士后科学基金面上项目(2013M532081)资助
通讯作者:     Email:
作者简介: 黄兴利(1981-),西北工业大学博士研究生,主要从事嵌入式系统研究。
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参考文献:
[1] Fujiwara H. Computational Complexity of Controllability/Observability Problems for Combinational Circuits[J]. IEEE Trans onComputers,1990,39(6): 762-767
[2] Maamari F,Rajski J. A Method of Fault Simulation Based on Stem Regions[J]. IEEE Trans on Computer-Aided Design of Inte-grated Circuits and Systems,1990,9(2): 212-220
[3] Pomeranz I,Patil S,Parvathala P K. A Functional Fault Model with Implicit Fault Effect Propagation Requirements[C]∥15thAsian Test Symposium,2006,95-102
[4] Henftling M,Wittmann H C,Antreich K J. A Single-Path-Oriented Fault-Effect Propagation in Digital Circuits ConsideringMultiple-Path Sensitization[C]∥Proc of Computer-Aided Design,1995: 304-309
[5] Sinanoglu O,Orailoglu A. RT-Level Fault Simulation Based on Symbolic Propagation VLSI Test[C]∥19th IEEE Symposium onVTS,2001: 240-245
[6] Kai-Hui C,Browy C. Improving Gate-Level Simulation Accuracy when Unknowns Exist[C]∥Design Automation Conference(DAC),2012: 936-940
[7] Eichelberger E B. Hazard Detection in Combinational and Sequential Switching Circuits[J]. IBM Journal of Research and De-velopment,1965,9(2): 90-99
[8] Lin B,Devadas B S. Synthesis of Hazard-Free Multilevel Logic Under Multiple-Input Changes From Binary Decision Diagrams[J]. IEEE Trans on CAD,1995,14(8): 974-985
[9] IWLS 2005 Benchmarks,Ver. 3. 0. http://iwls. org/iwls2005/benchmarks. html